HAL NAND IO Operation functions migration

This section provides information about the HAL NAND function migration.

Disables NAND ECC.

HAL1 / HAL2 

HAL_NAND_ECC_Disable()

Enables NAND ECC.

Note

In HAL1, HAL_NAND_ECC_Enable() enables the ECC computation directly without needing to specify the operation direction (read/program).

In HAL2, with the introduction of new series supporting sequencer command, a new input parameter access_mode is added to the ECC enable API. The access_mode parameter allows you to specify the direction: read, program, or ignore (when specifying the direction is not required).

HAL1

HAL2 

HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);

HAL_NAND_ECC_Enable(hal_nand_handle_t *hnand, hal_nand_access_mode_t access_mode);

Gets NAND ECC value.

Note

In HAL1, the API expects a pointer to a uint32_t variable (ECCval) where the ECC value will be directly stored. In HAL2, the ECC read value is stored in a more structured way, inside an ecc_parity_values_t structure.

In HAL1, the get ECC API waits for the ECC flags before reading the computed ECC value. In HAL2, waiting for the ECC flags is handled internally at the end of the write and read APIs. The timeout value is hardcoded and is no longer provided as an input parameter in the Get ECC API.

HAL1

HAL2 

HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);

HAL_NAND_ECC_ReadValue(hal_nand_handle_t *hnand, ecc_parity_values_t *p_ecc_value);

/* ------------ */
/* ------------ */
uint32_t *ECCval
/* ------------ */
/* ------------ */

 typedef struct
{
  uint32_t  ecc_parity_value_1;
  uint8_t   ecc_size_byte;
} ecc_parity_values_t;

Resets NAND device.

HAL1 / HAL2 

HAL_NAND_Reset()

Erases NAND block.

Note

In HAL1, the erase API takes a structured address (NAND_AddressTypeDef) and internally computes the block index to erase.

In HAL2, this API instead takes the block index directly within the entire memory array. HAL NAND address type definition

HAL1

HAL2 

HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress);

HAL_NAND_EraseBlock(hal_nand_handle_t *hnand, uint32_t block_index);

/* Initialize the nand address  */
Address.Block = 10;
Address.Page  = 50;
Address.Plane  = 0;

HAL_NAND_Erase_Block(&hnand, &Address);
HAL_NAND_Read_Status(&hnand);

uint32_t block_index = 10; /* Block index within the memory = Address.Plane(0) * BlockNbr(2048) + Address.Block(10) */




HAL_NAND_EraseBlock(&hnand, block_index);

Increments NAND address

HAL1

HAL2 

HAL_NAND_Address_Inc()

Removed.
In HAL 1 HAL_NAND_Address_Inc() used to increment the NAND address structure by automatically moving to the next page
and managing block and plane rollovers internally, and to check that the resulting address is valid.

In HAL2, the address is represented as a row address, so this internal increment is no longer needed and address progression is handled
at the application level, the address validation is performed inside the process APIs, which detect and report any out-of-range memory access.

Handles NAND interrupts.

Note

In HAL1, HAL_NAND_IRQHandler is triggered by rising, falling, and high-level interrupt events on the Ready/Busy signal, which are used as memory status notifications, as memory status reading is handled in the user code.

In HAL2, these interrupt sources are removed, as the memory status is now retrieved internally within the process APIs.

Consequently, HAL_NAND_IRQHandler is retained only for series that support interrupt sources other than Ready/Busy rising, falling, and high-level events; otherwise, it’s removed.

Reads NAND ID.

HAL1

HAL2 

HAL_NAND_Read_ID()

HAL_NAND_ReadID()

Note

In HAL1, the process APIs depend on the data width. In HAL2, a single unified API is provided that handles both 8-bit and 16-bit data widths.

In HAL1, process APIs handle multiple pages per call and require specifying the number of pages to read or write using the NumPage field. In HAL2, these APIs operate on a single page per call, so the NumPage parameter is no longer needed.

Read and write operations.

HAL1

HAL2 

HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);

HAL_NAND_ReadPage(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,  uint16_t *pBuffer, uint32_t NumPageToRead);

HAL_NAND_ReadPage(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);

HAL_NAND_ReadPageSpareArea(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint8_t *pBuffer, uint32_t NumPageToWrite);

HAL_NAND_ProgramPage(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint16_t *pBuffer, uint32_t NumPageToWrite);

HAL_NAND_ProgramPage(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);

HAL_NAND_ProgramPageSpareArea(hal_nand_handle_t *hnand, uint32_t page_index, void *p_data, uint32_t size_byte);

uint32_t numPages = 1;
/* Initialize the nand address  */
Address.Block = 10;
Address.Page  = 50;
Address.Plane  = 0;

HAL_NAND_Write_Page_8b(&hnand, &Address, program_data_buffer, numPages);
HAL_NAND_Read_Status(&hnand);

HAL_NAND_Read_Page_8b(&hnand, &Address, read_data_buffer, numPages);

uint32_t page_index = 690; /* Page index within the memory = Address.Plane(0) * BlockNbr(2048) * BlockSize(64) + Address.Block(10) * BlockSize(64) + Address.Page(50) */





 HAL_NAND_ProgramPage(&hnand, page_index, program_data_buffer, page_size);


 HAL_NAND_ReadPage(&hnand, page_index, read_data_buffer, page_size);